99 research outputs found

    Understanding and Exploiting Optimal Function Inlining

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    Assessment of Physical Activity Patterns in Adolescent Patients With Anorexia Nervosa and Their Effect on Weight Gain

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    (1) Background: Altered physical activity (PA) affects weight recovery in anorexia nervosa (AN) patients. The study aimed to objectively characterize PA patterns and their effect on weight trajectory in adolescent AN patients. (2) Methods: PA was assessed in 47 patients on admission to inpatient treatment, in n = 25 of these patients again 4 weeks after discharge (follow-up, FU), as well as in 20 adolescent healthy controls using the Sense Wearℱ armband. The following PA categories were defined by metabolic equivalent (MET) ranges: sedentary behavior (SB), light (LPA), moderate (MPA), vigorous (VPA), and high-level PA (HLPA= MPA + VPA). (3) Results: LPA on admission was significantly higher in AN patients than in controls (103 vs. 55 min/d, p < 0.001), and LPA in AN decreased over time to 90 min/d (p = 0.006). Patients with higher admission LPA (n = 12) still had elevated LPA at FU (p = 0.003). High admission LPA was associated with a higher inpatient BMI percentage gain (ΔBMI%; 18.2% ± 10.0% vs. 12.0% ± 9.7%, p = 0.037) but with a loss of ΔBMI% at FU (-2.3% ± 3.6% vs. 0.8% ± 3.6%, p = 0.045). HLPA at baseline was associated with a lower inpatient ΔBMI% (p = 0.045). (4) Conclusion: Elevated LPA in AN patients decreased after inpatient treatment, and PA patterns had an impact on weight trajectory

    TensorFlow as a DSL for stencil-based computation on the Cerebras Wafer Scale Engine

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    The Cerebras Wafer Scale Engine (WSE) is an accelerator that combines hundreds of thousands of AI-cores onto a single chip. Whilst this technology has been designed for machine learning workloads, the significant amount of available raw compute means that it is also a very interesting potential target for accelerating traditional HPC computational codes. Many of these algorithms are stencil-based, where update operations involve contributions from neighbouring elements, and in this paper we explore the suitability of this technology for such codes from the perspective of an early adopter of the technology, compared to CPUs and GPUs. Using TensorFlow as the interface, we explore the performance and demonstrate that, whilst there is still work to be done around exposing the programming interface to users, performance of the WSE is impressive as it out performs four V100 GPUs by two and a half times and two Intel Xeon Platinum CPUs by around 114 times in our experiments. There is significant potential therefore for this technology to play an important role in accelerating HPC codes on future exascale supercomputers.Comment: This preprint has not undergone any post-submission improvements or corrections. Preprint of paper submitted to Euro-Par DSL-HPC worksho

    Graphene-Mercury-Graphene Sandwich Electrode for Electroanalysis

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    We present a new class of hybrid 2D electrodes, where mercury is incorporated between two graphene monolayers, prepared by bottom-up assembly. First, the bottom graphene layer is electrochemically modified leading to the creation of fine mercury nanodroplets of variable size on the graphene surface. Although such electrodes show good sensitivity to heavy metal ions, their stability is limited due to the outgassing of mercury over time. After coverage with a top monolayer, the graphene surface is rendered with the favorable properties of mercury such as the high overpotential for hydrogen evolution, the ability to work at a broader cathodic potential range and higher sensitivity towards heavy metal ions such as Cd2+ and Pb2+. Most importantly, the outgassing of mercury is completely hindered by the top layer, which yields a stable mercury-like electrode but with a carbonaceous non-toxic interface. We attribute the favorable properties of the sandwich electrode to the subsurface mercury present below the top graphene sheet, which renders it with new electrochemical properties.German Science Foundation (DFG)Graduate School of Analytical Sciences AdlershofMPI StuttgartHZB http://dx.doi.org/10.13039/100013110HU BerlinPeer Reviewe

    Design of graphite and the Polyhedral Compilation Package

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    Graphite is the loop transformation framework that was introduced in GCC 4.4. This paper gives a detailed description of the design and future directions of this infrastructure. Graphite uses the polyhedral model as the internal representation (GPOLY). The plan is to create a polyhedral compilation package (PCP) that will provide loop optimization and analysis capabilities to GCC. This package will be separated from GIMPLE via an interface language that is restricted to express only what GPOLY can represent. The interface language is a set of data structures that encodes the control flow and memory accesses of a code region. A syntax for the language is also defined to facilitate debugging and testing

    mlirSynth: Automatic, Retargetable Program Raising in Multi-Level IR using Program Synthesis

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    MLIR is an emerging compiler infrastructure for modern hardware, but existing programs cannot take advantage of MLIR’s high-performance compilation if they are described in lower-level general purpose languages. Consequently, to avoid programs needing to be rewritten manually, this has led to efforts to automatically raise lower-level to higher-level dialects in MLIR. However, current methods rely on manually-defined raising rules, which limit their applicability and make them challenging to maintain as MLIR dialects evolve. We present mlirSynth – a novel approach which translates programs from lower-level MLIR dialects to high-level ones without manually defined rules. Instead, it uses available dialect definitions to construct a program space and searches it effectively using type constraints and equivalences. We demonstrate its effectiveness by raising C programs to two distinct high-level MLIR dialects, which enables us to use existing high-level dialect specific compilation flows. On Polybench, we show a greater coverage than previous approaches, resulting in geomean speedups of 2.5x (Intel) and 3.4x (AMD) over state-of-the-art compilation flows. mlirSynth also enables retargetability to domain-specific accelerators, resulting in a geomean speedup of 21.6x on a TPU
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